1. Field of the Invention
The present invention relates to a chip package, and in particular relates to a chip package having a metal layer covering under the chip.
2. Description of the Related Art
Advances in semiconductor processing technologies are dramatically reducing the feature sizes of integrated circuit (IC) devices such that more semiconductor elements are formed within a smaller chip. In addition to improving chip performance, the wafer area is further saved to reduce manufacturing cost. However, due to the ever-decreasing size of chips and the ever-increasing density of devices formed therein, the amount and the density of the input/output connections are increasing accordingly, such that formation of connection paths to the chip is getting difficult. In addition, when devices with high density operate in a smaller chip, a lot of heat may be generated and performance of the chip may be negatively affected.